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mp6400 low quiescent current programmable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 1 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the mp6400 family is the microprocessor (p) supervisory circuit which can monitor and provide reset function for system voltages from 0.4v. when either the sense voltage falls below its threshold (v it ) or the voltage of manual reset ( m r ) is pulled to a logic low, the r e s e t signal will be asserted. the reset voltage can be factory-set for standard voltage rails from 0.9v to 5v, while the mp6400dg(j)- 01 reset voltage is adjustable with an external resistor divider. when sense voltage and m r exceed their thresholds, r e s e t is driven to a logic high after a user-programmable delay time. the mp6400 has a very low quiescent current of 1.6 a typically, which makes it ideal suitable for battery-powered applications. it provides a precision reference to achieve 1% threshold accuracy. the reset delay time can be selected by a capacitor which is connected between c delay and gnd, allowing the user to select any delay time from 2.1ms to 10s. 380ms delay time is selected by connecting the c delay pin to v cc , while 24ms delay time by leaving the c delay pin float. mp6400 is available in tsot23 and 2mm2mm 6-pin qfn packages. features ? fixed threshold voltages for standard voltage rails from 0.9v to 5v and adjustable voltage from 0.4v are available ? low quiescent current: 1.6ua typ ? power-on reset generator with adjustable delay time: 2.1ms to 10s ? high threshold accuracy: 1% typ ? manual reset ( m r ) input ? open-drain r e s e t output ? immune to short negative sense voltage ? guaranteed reset valid to v cc =0.8v ? 6 pin tsot23 and 2mm2mm qfn applications ? dsp or micro controller applications ? laptop/desktop computers ? pdas/hand-held products ? portable/battery-powered products ? fpga/asic applications all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithi c power systems, inc. typical application v cc r1 vcc sense mr gnd c delay c delay c3 gnd reset reset r2 microprocessor dsp microcontroller mp6400 c1 c2 r3
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 2 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm ordering information part number* package top marking free air temperature (t a ) mp6400dg-01 5b mp6400dg-09 ad mp6400dg-12 ac mp6400dg-15 6v mp6400dg-25 4v MP6400DG-30 9s mp6400dg-33 qfn6 (2x2mm) 9r mp6400dj-01 4b mp6400dj-09 aag mp6400dj-12 aaf mp6400dj-15 6v mp6400dj-25 4v mp6400dj-30 8s mp6400dj-33 tsot23-6 3s ?40 c to +85 c * for tape & reel, add suffix ?z (e.g. mp6400dg?xx-z); for rohs compliant packaging, add suffix ?lf (e.g. mp6400dg?xx-lf?z). * for other versions, contac t factory for availability. package reference top view vcc sense c delay 1 2 3 reset gnd mr 6 5 4 reset gnd mr 1 2 3 6 5 4 vcc sense c delay top view qfn6 (2mm x 2mm) tsot23-6
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 3 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm absolute maxi mum ratings (1) supply voltage v cc ......................... -0.3 to 6.5 v c delay voltage v cdelay ....... ?0.3v to v cc + 0.3v sense voltage v sense ....................?0.3v to 6v all other pins ..............................?0.3v to +6.5v reset current reset i ................................ 5ma continuous power dissipation (t a = +25c) (2) qfn6 (2mmx2mm) .................................... 2.5w tsot23-6 ................................................ 0.57w junction temperature ...............................150 c lead temperature ....................................260 c storage temperature.............. ?65 c to +150 c recommended operating conditions (3) supply voltage v cc ............................1.8v to 6v operating junct. temp (t j )..... ?40 c to +125 c thermal resistance (4) ja jc qfn6 (2mmx2mm) ................50 ...... 12 ... c/w tsot23-6 ..............................220 .... 110 .. c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7 4-layer board.
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 4 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm electrical characteristics 1.8v v cc 6v, r 3 = 100k ? , c 3 = 47pf, t a = -40c to +85c, typical values are at t a =+25c, unless otherwise noted. parameters symbol condition min typ max units input supply range v cc 1.8 6 v v cc = 3.3v, r e s e t not asserted. m r , r e s e t , c delay open 1.6 3.5 a supply current (current into v cc pin) i cc v cc = 6v, r e s e t not asserted. m r , r e s e t , c delay open 1.85 12 a 1.3v v cc < 1.8v, i ol = 0.4ma 0.3 v low-level output voltage v ol 1.8v v cc 6v, i ol = 1.0ma 0.4 v power-up reset voltage (5) v ol (max) = 0.2v, r e s e t i 1 5 u a = t rise(vcc) 15s/v 0.8 v negative-going input threshold accuracy v it v sense falling slowly 1.0 2.0 % hysteresis on v it pin v hys 1.5 3.5 v it % m r internal pull-up resistance m r r 50 110 k ? mp6400dj-01 v sense = v it -25 +25 na input current at sense pin i sense fixed versions v sense = 6v 2.4 a r e s e t leakage current r e s e t v = 6v, r e s e t not asserted 300 na m r logic low input v il 0.25v cc v m r logic high input v ih 0.7v cc v sense maximum transient duration t w v ih = 1.05 v it , v il = 0.95 v it 17.5 s c delay = open 15 24 34 ms c delay = v cc (6) 230 380 530 ms c delay = 150pf 1.3 2.1 3 ms r e s e t delay time t d c delay = 10nf (6) 61 102 142 ms m r to r e s e t propagation delay t phl1 v ih = 0.7 v cc , v il = 0.25 v cc 160 ns high to low level r e s e t delay, sense to r e s e t t phl2 v ih = 1.05 v it , v il = 0.95 v it 17.5 s note: 5) the lowest supply voltage (v cc ) at which r e s e t becomes active. 6) guaranteed by design.
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 5 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm standard versions (7) product package top mark nominal supply voltage threshold voltage (vit) mp6400dg-01 qfn 5b mp6400dj-01 tsot23 4b adjustable 0.4v mp6400dg-09 qfn ad mp6400dj-09 tsot23 aag 0.9v 0.84v mp6400dg-12 qfn ac mp6400dj-12 tsot23 aaf 1.2v 1.12v mp6400dg-125 qfn contact factory mp6400dj-125 tsot23 contact factory 1.25v 1.16v mp6400dg-15 qfn 6v mp6400dj-15 tsot23 6v 1.5v 1.40v mp6400dg-18 qfn contact factory mp6400dj-18 tsot23 contact factory 1.8v 1.67v mp6400dg-25 qfn 4v mp6400dj-25 tsot23 4v 2.5v 2.33v MP6400DG-30 qfn 9s mp6400dj-30 tsot23 8s 3.0v 2.79v mp6400dg-33 qfn 9r mp6400dj-33 tsot23 3s 3.3v 3.07v mp6400dg-50 qfn contact factory mp6400dj-50 tsot23 contact factory 5.0v 4.65v note: 7) in ?mp6400dg(j)- _ _?, the ?_ _? are placeholders for the monitored voltage levels of the devices. desired monitored voltage s are set by the suffix found in ordering information.
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 6 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm pin functions qfn pin # tsot pin # name description 6 1 r e s e t r e s e t is an open drain signal which will be asserted when the sense voltage drops below a preset threshold or when the manual reset ( m r ) pin drops to a logic low. the r e s e t delay time is programmable from 2.1ms to 10s by using external capacitors. a pull-up resistor bigger than 10k should be connected this pin to supply line, and the r e s e t outputting a higher voltage than v cc is allowable. 5 2 gnd ground. 4 3 m r the manual reset ( m r ) can introduce another logic signal to control the r e s e t . it is internally connected to v cc through a 90k ? resistor. 3 4 c delay programmable reset delay time pin. when c delay connected to v cc through a resistor between 50k ? and 200k ? , a 380ms delay time is selected. when c delay floated, the delay time is 24ms. a capacitor bigger than 150pf connected c delay to gnd could be used to get the user?s programmable time from 2.1ms to 10s. 2 5 sense sense pin is connected to the monitored system voltage. when the monitored voltage is below desired threshold, r e s e t is asserted. 1 6 v cc supply voltage. a 0.1uf decoupling ceramic capacitor should be put close to this pin. detail description the mp6400 product family asserts a r e s e t signal when either the sense pin voltage is lower than v it or the manual reset ( m r ) is driven low. the mp6400 family can be monitored a fixed voltage from 0.9v to 5.0v, while the mp6400dg(j)-01 can monitor any voltage above 0.4v by adjusting the external resistor divider. after both the manual reset ( m r ) and sense voltages exceed their thresholds, the r e s e t output remains asserted for a user?s programmable delay time. two fixed r e s e t delay times are user-selectable: 380ms delay time by connecting the c delay pin to v cc , and 24ms delay time by leaving the c delay pin float. any delay time from 2.1ms to 10s could be gotten by connecting a capacitor between c delay and gnd. the wide monitor voltage and programmable reset delay time make mp6400 product family suitable for a broad array of applications.
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 7 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm typical performanc e characteristics v cc =3.3v, r 3 = 100k ? , c 3 = 47pf, t a = -40c to +85c, typical values are at t a =+25c, unless otherwise noted. i reset vs. low level reset voltage 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0510 15 i reset (ma) low level r eset voltage(v) v cc =1.8v v cc =3.3v v cc =6v v it vs. temperature v it (v) reset delay vs.temperature (c delay =v cc ) reset delay(ms) c delay (uf) reset delay time vs. c delay 01020304050 supply current vs. v cc 0 1 2 3 4 1.5 2.5 3.5 4.5 5.5 v cc (v) supply current(ua) 0.001 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 reset delay time(s) maximum sense transient duration vs.sense threshold overdrive voltage 1 10 100 sense threshold overdrive(%) maximum sense transient duration(us) reset delay vs.temperature (c delay =open) 20 22 24 26 28 30 -40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 reset delay(ms) +85 o c +25 o c -40 o c 0.395 0.396 0.397 0.398 0.399 0.4 0.401 320 340 360 380 400 420 440 460
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 8 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm functional block diagram 0.4v reset logic timer reset logic timer mp6400dj-01 adjustable voltage mp6400dj-xx vcc vcc vcc mr reset c delay gnd adjustable voltage version sense 90k vcc 90k -- + 0.4v r1 r2 -- + sense gnd fixed voltage version c delay mr reset figure 1?functional block diagram 0.8v 0.0v v it +v hys v it 0.7v cc 0.25v cc v cc reset sense t d t d t d mr time timing diagram t d =reset delay =undefined state figure 2?mp6400 timing diagram truth table m r sense > v it r e s e t l 0 l l 1 l h 0 l h 1 h
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 9 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm application information reset output function the mp6400 r e s e t output is typically connected to the r e s e t input of a microprocessor, as shown in figure 3. when r e s e t is not asserted, a pull up resistor must be connected to hold this signal high. the voltage of reset signal is allowed to be higher than v cc (up to 6v) through a resistor pulling up from supply line. if the voltage is below 0.8v, r e s e t output is undefined. this condition can be ignored generally because that most microprocessors do not function at this state. when both sense and m r are higher than their threshold voltage, r e s e t output holds logic high. once either of the two drops below their threshold, r e s e t will be asserted. v cc r1 vcc sense mr gnd c delay c delay 47pf gnd reset reset r2 microprocessor dsp microcontroller 0.1uf 1nf 100k figure 3?typical application of mp6400 with microprocessor from the point that m r is again logic high and sense is above v it + v hys (the threshold hysteresis), r e s e t will be driven to a logic high after a reset delay time. the reset delay time is programmable by c delay pin. due to the finite impedance of r e s e t pin, the pull up resistor should be bigger than 10k ? . monitor a voltage the sense input pin is connected to the monitored system voltage directly or through a resistor network (on mp6400dj-01). when the voltage on the pin is below v it , r e s e t is asserted. a threshold hysteresis will prevent the chip from responding perturbation on sense pin. a 1nf to 10nf bypass capacitor should be put on this pin to increase its immunity to noise. a typical application of the mp6400dj-01 is shown in figure 4. two external resistors form a voltage divider from monitored voltage to gnd. its tap connects to the sense pin. the circuit can be used to monitor any voltage higher than 0.4v. vcc sense gnd r2 1nf r1 v sen v out v it = (1+ ) r1 r2 0.4 mp6400dj-01 reset figure 4?mp6400dj-01 monitoring a user- defined voltage monitor multiple system voltages the manual reset ( m r ) can introduce another logic signal to control the r e s e t . when m r is a logic low (0.25v cc ), r e s e t will be asserted. after both sense and m r are above their thresholds, r e s e t will be driven to a logic high after a reset delay time. the m r is internally connected to v cc through a 90k ? resistor so this pin can float. see how multiple system voltages are monitored by m r in figure 5. if the signal on m r isn?t up to v cc , there will be an additional current through internal 90k ? pull up resistor. a logic-level fet can be used to minimize the leakage, as shown in figure 6. sense 1.2v 3.3v vcc sense vcc gnd gnd gnd c delay c delay v i/o v core mp6400dj-12 mp6400dj-33 dsp reset reset reset mr figure 5? mp6400 family monitoring multiple system voltages
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 10 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm reset mr gnd 3.3v sense vcc mp6400dj-33 figure 6?minimizing i cc when m r signal isn?t over v cc by external mosfet programmable reset delay time the reset delay time can be programmed by c delay configure. when c delay is connected to vcc through a resistor between 50k ? and 200k ? , the delay time is 380ms. when c delay floated, the delay time is 24ms. in addition, a capacitor connected c delay to gnd could be used to get the user?s programmable delay time from 2.1ms to 10s. the three configures can be found in figure 7(a)(b)(c). reset gnd 3.3v c delay c delay c delay c delay 50k sense vcc mp6400dj-33 reset gnd 3.3v (a) (b) (c) 380ms delay 24ms delay sense vcc mp6400dj-33 reset gnd 3.3v sense vcc mp6400dj-33 figure 7?programmable configurations to the reset delay time the external capacitor c delay must be larger than 150pf. for a given delay time, the capacitor value can be calculated using the following equation: 107 s 4.99 s t nf c d delay ? = ? )] ( 10 ) ( [ ) ( 4 the reset delay time is determined by the charge time of external capacitor. while sense is above v it and m r is a logic high, the internal 140na current source is enabled and starts to charge the capacitor to set the delay time. when the capacitor voltage rises to 1.13v, the r e s e t is de- asserted. the capacitor will be discharged when the r e s e t is again asserted. stray capacitance may cause errors of the delay time. a ceramic capacitor with low leakage is strongly recommended. sense voltage transients immunity the mp6400 can be immune to sense pin short negative transient. the maximum immune duration is 17us while overdrive is 5%. a shorter negative transient can not assert the r e s e t output. the effective duration is relative to the threshold overdrive, as shown in figure 8. 01020304050 maximum sense transient duration vs.sense threshold overdrive voltage 1 10 100 sense threshold overdrive(%) maximum sense transient duration(us) figure 8 ?maximum transient duration vs. sense threshold overdrive voltage
mp6400 -- low quiescent current prog rammable-delay supervisory circuit mp6400 rev. 1.0 www.monolithicpower.com 11 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm package information qfn6 (2mm x 2mm) side view top view 1 6 4 3 bottom view 1.90 2.10 0.65 0.85 1.90 2.10 1.25 1.45 0.65 bsc 0.20 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 0.70 0.65 0.25 recommended land pattern 1.90 note: 1) all dimensions are in millimeters. 2) exposed paddle size do es not include mold flash. 3) lead coplanarity shall be 0.10 millimeter max. 4) jedec reference is mo-229, variation vccc. 5) drawing is not to scale. pin 1 id see detail a 1.40 0.70 pin 1 id option a 0.30x45o typ. pin 1 id option b r0.20 typ. detail a 0.30 0.40 pin 1 id index area
mp6400 -- low quiescent current prog rammable-delay supervisory circuit notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp6400 rev. 1.0 www.monolithicpower.com 12 9/7/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. tm tsot23-6

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